RF and Millimeter wave (“RF/mmWave”) systems occupy the frequency spectrum from 9 kHz to 300 GHz. MmWave systems are not only growing in their in the traditional application areas such as telecommunications and defense/security, but most recently we are seeing growing applications in consumer products which demand higher levels of integration and lower device costs.
Traditional RF Chip design (frequencies <= 8GHz typically operate on extremely low-level signals in noisy power-constrained environments. The design methodology uses “lumped-element” design approaches with detailed circuit parasitic modeling. But at mmWave frequencies of 30GHz and above, detailed transmission line oriented Electromagnetic simulations are required. with unique RF/mmWave design approaches, EDA tool flows, and expertise. In addition, RF/mmWave ASICs are no longer simple stand-alone devices with static control configurations. Modern RF/mmWave systems contain complex interdependent signal flows with significant interaction between multiple RF and baseband controllers across multiple devices, transmission media and package interfaces. This emphasizes verification and system performance simulations early and often in the design cycle.
Intrinsix has production proven experience across the frequencies and applications of RF/mmWave systems – and the high integration issues that arise when looking for reduction in size, weight, power, and optimization of development costs.
Successful RF/mmWave ASIC designs begin with a detailed understanding of the system requirements. RF systems between 700MHz and 6GHz are already part of our daily lives in smartphones, GPS, WiFi, and Bluetooth and have proven that low power miniature RF systems on advanced process nodes are feasible. New applications at mmWave frequencies based on very narrow transmission beam widths are creating similar game-changers. The short signal wavelength at these frequencies, coupled with advances in semiconductor processes, packaging, and antenna technology allow precise beams to be steered in miniature form factors enabling a whole range of applications. In the commercial world, these include multi-Gbps data links for wireless backhaul, 5G high-speed data connections, portable satellite terminals and high-speed internet to rural locations. The ability to transmit, steer and receive narrow beams enables the next generation of automotive radar required for driverless cars. The unique characteristics of mmWave signals allow for high resolution discrimination of metal or dense objects from softer human tissue and enable a new generation of security scanners to protect airports, industrial facilities, and schools. Such systems can also be used in novel diagnostic or health monitoring in a nonintrusive way.
In the defense sector, threats and corresponding countermeasures have moved up the frequency spectrum.
Commitment to spectral dominance and the requirement to neutralize rapidly evolving asymmetric threats at multiple frequencies has led to a revolution in how RF/mmWave systems are conceived, developed and utilized. The ability to sense and understand the surrounding spectrum and characterize emitter locations, signal types requires precision navigation and timing information, high-fidelity data exchange and networked sensors. Software-defined radio systems are becoming much more prevalent, waveforms can change instantly, driving the need for signals intelligence and spectrum awareness systems to become much more adaptive. New signals need to be characterized on the fly. RF/mmWave systems need to be converged to utilize the same antenna subsystems on increasingly space and power constrained systems. Unmanned aerial vehicles can no longer afford a dedicated radio device, signals intelligence sensor, and electronic warfare sensor. These functions need to be integrated with each other to reduce the overall size, weight, and power (SWaP) which is required on a tactical platform.
All these emerging systems operate with multiple RF/mmWave ASICs tightly coupled to the antenna subsystem with integrated packaging of printed circuit boards in the presence of high-speed digital subsystems for signal processing, and command and control. Antenna arrays for millimeter-wave systems create extraordinarily narrow beam widths and are mounted orthogonally on PCB substrates together with RF/mmWave ASICs. These systems typically have significant trade offs in performance, cost and power consumption making the choice of optimum process technology both critical and challenging. Experience with a range of advanced nodes on SiGe, SOI, FinFET, GaAs PHEMT, GaN is extremely valuable in defining the overall system solution and executing and subsequent development.
The foundation of any successful RF/mmWave ASIC development is the background building block IP at all levels of abstraction targeted to support a wide range of foundries. Intrinsix “Jump Start kits” contain the collective design wisdom of multiple RF/mmWave projects and the Intellectual Property critical in avoiding a “start from scratch” scenario on each design. These kits provide the starting point for block level design in RF/mmWave systems such as communication links, beam forming networks, phase array systems or low power designs. Intrinsix has a comprehensive array of Jump Start IP which typically include schematics, test benches and some initial layout.
Traditional RF design and especially mmWave design is unique in the sense that physical parasitics significantly affect performance. Unfortunately, this means that RF blocks do not easily transport from one process to another and a realistic model of the impact of layout needs to be included in early stages of the design to optimize the overall ASIC performance. This layout related information can be included in Jump Start Kit schematics in the form of schematic par models which include critical parasitic elements based on prior physical design experience. If required, block level physical layouts can be extracted or simulated with full EM simulation tools to provide detailed estimates of the impact of layout.
At mmWave frequencies it is especially important to design for testability at the block as well as the chip level. This has led to the notion of test chips which contain current and future building blocks. These test chips are vehicles for testing new ideas – switchable tuning elements (L&C), coupled differential structures, lower loss phase shifters, matching circuits etc. They serve to de-risk complex mmWave IC development by obtaining verification of critical building blocks in a low risk and cost-effective manner. These test chips also have all the necessary calibration and de-embedding blocks required for high frequency testing.
RF/mmWave ASICs are no longer simple stand-alone devices with static control configurations. Traditional systems consisted of a simple cascade of blocks and block specifications such as gain, SNR, and linearity were determined from simple cascade analysis. Modern systems contain complex interdependent signal flows with system level interactions between multiple RF and baseband controller devices. Signal flows cross multiple devices, transmission media and package interfaces. Top level design requires co-simulation of multiple devices for performance, functionality, and timing. System performance often depends on post calibration results that cannot easily be defined by simple pre-calibration simulations. In many cases, a full up system simulation is required to develop and define appropriate system specifications. Intrinsix has developed a robust RF/mmWave design flow refined from many designs over many years.
RF/mmWave systems with increasingly sophisticated requirements mandate a simultaneous “tops down” and “bottoms up” design flow where the performance and functionality of the overall design can be continuously verified as the block level designs evolve. The initial block level designs are derived from available Jump Start Kits or in some cases developed from scratch. These blocks are floor-planned early in the design cycle and the impact of any layout affects is anticipated. The initial focus is on the critical blocks that have significant impact on system performance. In parallel with the initial block design effort, system level test benches and performance verification flows are established so that requirements can flow down to the blocks and performance results can be rolled up to the top level.
This combination of “top down” and “bottom up” design flows reduces the overall risk of RF/mmWave design. System-wide requirements are verified first using traditional timing budgets and re-verified using Chip-in-Package on PCB simulations. Co-Simulation between RF blocks, Analog blocks, and Digital logic is enabled using behavioral models (including critical impairments) for less-critical blocks to improve simulation times. The result is an improved confidence that the RFIC will not only meet the device specification but will work as intended in the system.
Intrinsix understands that a critical success factor in RF/mmWave design is the experience of the key technical staff. All Intrinsix RF/mmWave design leads have an established track record of successful designs in multiple process nodes on commercial and defense applications. The typical level of experience of an RF design lead is 20 to 30 plus years spanning all aspects of RF, analog and mmWave Integrated circuits and subsystems. This includes experience in high volume commercial and demanding defense systems. Intrinsix RF project leads have experience with advanced FinFET nodes as well as SOI, SiGe, GaAs PHEMT and GaN processes. Experience working with customers on the detailed requirements, design phase and bring up of a RF/mmWave ASIC is another distinguishing feature of Intrinsix RF design leads as well as the ability to innovate and develop leading edge but practical design solutions.
The engineering team at Intrinsix embrace the latest advances in new tools and process technologies as they have become available and have broad and deep relationships with the major EDA tool vendors and foundry support personnel. In addition, RF/mmWave projects also utilize dedicated Mixed-Signal Verification engineers to create the verification flow specific to each new chip. Together our RF design, Mixed-Signal verification and physical design engineers form a team of seasoned veterans that love new challenges and are proud of their extraordinarily successful run of working chips.