Not All Process Design Kits Are Created Equal
Process design kits (PDKs) play an integral role in the design of integrated circuits (ICs). In simplified terms, PDKs consist of a set of files containing data and algorithms that model and describe the manufacturing parameters for a given silicon process. They have evolved over the years to deal with the increasing complexities and rapid evolution of silicon process technology. PDKs are typically supplied by foundries, and are used to guide the tools that are utilized in the IC design process, including simulation, layout, and design rule checks. If a PDK is deficient in any way – e.g., if it has insufficient or missing data/parameters – then the IC design itself will likely contain deficiencies. These deficiencies can manifest themselves as performance issues, yield issues, and in the worst case, they can lead to a costly and time-consuming redesign effort.
It would be completely reasonable to assume that a PDK, as delivered by the foundry, is in good working order since that is in the best interest of the foundry. But at Intrinsix, we've discovered that this is not always the case. From experience that spans hundreds of projects, we've learned that not all PDKs are created equal – some are more complete and more accurate than others. Rather than leaving it to chance, and possibly fabricating silicon that fails in the lab, we have established a formal review process for all PDKs to verify that it is complete, and high quality.
Checking Process Design Kits
What kinds of items do we look for?
- Review to make sure that correct assumptions have been made regarding voltage and current ratings,
- Review how well the device models correlate with measured data, and,
- If insufficient data is provided, perform sanity check simulations to confirm that critical device model parameters fall within their theoretical bounds.
The following paragraphs discuss these checks in more detail.
Checking Voltage and Current Ratings
Obviously, problems may arise if one makes assumptions about the voltage and current ratings of a device. So, it's important to verify these assumptions, especially if the PDK includes high-voltage (> 5 V) MOSFETs. For example, in our experience, we've seen that passive components, as well as MOSFET body/bulk diodes, are not always rated for the highest supply voltage. If these devices operate beyond their voltage or current ratings, it can result in performance degradation, and even device breakdown, which may be expensive to rectify. Therefore, during simulations, we'd like to be notified if this happens. Unfortunately, not all PDKs comprehensively produce these warnings. So, it's a good idea to perform simulations on each device in a PDK to see if warnings are produced when they are pushed past their voltage or current ratings. If warnings are not produced, safe operating area (SOA) checks should be implemented to monitor for overvoltage and overcurrent conditions.
Correlating Models with Measured Data
To make sure that devices perform as expected, it's also important to review the PDK documentation to determine how well the device models correlate with measured data. Essentially, we want to see how well the model reflects reality. If there are operating regions where the correlation is poor, avoid using devices in these regions if possible. Similarly, if there are device sizes with poor correlation, avoid using these dimensions if possible.
Other Sanity Checks
There may be other sanity check simulations that should be performed if insufficient data is provided in the PDK documentation, depending on the nature of the IC. For example, if MOSFET noise is of particular concern, then it would be wise to perform a single transistor simulation, where the channel length is swept, to verify that the predicted thermal noise spectral density falls within the theoretical bounds.
A lot depends on the integrity of a PDK. It would be nice if we could always assume that a PDK is 100% correct and complete; but, unfortunately, that is not always the case. It is better to invest the effort up front, and flush out problems with the PDK early in the design cycle, than to engage in costly re-design effort toward the end of the project.