Modeling Strategies for a Buck DC-DC Converter
- Design Verification
- May 17, 2017 7:29:00 AM
Strategies for comprehensively simulating an ASIC often require multiple models for the same block in the design. Each model serves a different purpose in the verification plan. One model may be appropriate for verifying a block in isolation. Another model may be required to verify the block in the context of a larger system. In many cases, different models are required for verifying different properties of the same block. The difference between these models often boils down to the level of abstraction, with more abstract models sacrificing accuracy for simulation speed. Each model embodies a trade-off designed to meet the goal of the verification task.
Buck DC-DC converters illustrate this point nicely. These analog circuits are commonly used in ASICs to convert DC voltage levels. They are conceptually simple circuits that are very efficient at voltage conversion. But, as is often the case, things are more complicated in practice. Much can go wrong. This is where the verification plan comes in. There are at least three verification tasks that must be addressed:
- Confirm that the buck converter operates according to specification.
- Demonstrate the stability of the buck converter over a wide range of external component values and conversion settings.
- Verify the larger system that contains the buck converter.
Each of these verification tasks will place different demands on the buck converter model. The first requires a detailed switching model that faithfully replicates the intricate workings of the circuit elements. This model provides the most accurate means to demonstrate the operation of a converter and is often the starting point for the transistor design. But switching models only work in time domain simulations; and they run slow, making them impractical for system simulations, or tasks that require frequency domain analysis.
The second task – stability analysis - requires a model capable of doing frequency domain analysis. Averaging models are used for this purpose. These models replace the switching mechanisms with blocks that emulate the average behavior of the switches. They run much faster than switching models and can be used to generate Bode and pole-zero plots. But these averaging models typically contain only the bare minimum required for stability analysis. They tend to focus on only one of the two operating modes of the converter - Continuous Conduction Mode (CCM), for the most part ignoring the Discontinuous Conduction Mode (DCM).
A more comprehensive averaging model can be created that will emulate both operating modes. This model can be used for task 3 above – high-level system simulations in which the power converter is one of many blocks in a complex system. In these more comprehensive simulations, conditions may vary over a wide range, requiring the averaging model to operate in both CCM and DCM mode. A method for creating a buck converter averaging model that handles both modes is discussed below.
Dual Mode Buck Converter Averaging Model
The goal of the dual mode averaging model is to accurately emulate both CCM and DCM modes and to seamlessly switch between them during time domain simulations. The function that decides when to switch between modes can either be a simple diode emulation function or a more sophisticated algorithm. For example, if the low side switch is designed to behave like a diode, then it is the diode emulating function that decides when to switch between modes. Sometimes the operating conditions force the converter to operate right at the boundary between CCM and DCM. Then there is a risk of limit cycling occurring which is when the conduction mode is randomly jumping between CCM and DCM. To resolve this, a more sophisticated algorithm is used which will delay the mode transition until it determines that the conduction mode will be a steady state condition instead of a brief transient event.
The functionality described below emulates a simple diode. A description of a more sophisticated algorithm will be added to this blog sometime in the future. Create both conduction model functions, CCM and DCM. Connect the CCM and DCM outputs to a dummy version (copy) of the switched side of the inductor voltage. Allow both modes to operate simultaneously, and continuously measure the magnitude of the output current from each mode. Select the highest one and duplicate its flow to the actual inductor voltage. This is illustrated schematically in Figure 1 below.
During simulation, the operating conditions may constantly be changing, causing changes in the conduction mode. By continuously monitoring and duplicating the highest mode current, the dual mode averaging model can switch seamlessly between conduction modes similar to the way the switching model does, providing a more accurate emulation of the buck converter under a wider range of operating conditions. This model will run nearly as fast as the single mode averaging model and will work well in system simulations.
The buck converter is just one example of a circuit that requires different models in different situations. Most design blocks in an ASIC will require multiple models to satisfy the myriad verification requirements. Understanding the different types of models that are required, and when to use them is a critical ingredient of first pass success.
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