How Will the Chiplet Marketplace Emerge?
This series of blogs looks at the future of the semiconductor industry and the current issues with cost and the resulting stagnation of innovation. The number of new custom ASICs is shrinking, and FPGAs do not totally fill the void when it comes to high performance, power, and RF/analog capability. Heterogeneous Systems on Chip (HSoC) composed of individual chiplets, fabricated in their optimal processes and connected on a silicon substrate using heterogeneous 2.5D technology, is the future and the technology and business frameworks are evolving to make this paradigm a reality.
This edition of the blog will look at the impediments facing chiplets and potential future evolutions of the chiplet marketplace.
How Will the Chiplet Marketplace Emerge?
As we’ve seen in previous editions of this blog, the exciting new technology of heterogeneous 2.5D integration promises to solve a number of the industry’s problems, including: alleviating Moore’s law, providing access to high end processing to the masses while lowering initial NRE, improving yield, and enabling faster time to market.
The main issue facing this evolving technology is more of a business model one rather than a technological one. A number of large semiconductor companies are using 2.5D integration today and often for different reasons. However, these companies have the size and scale to forge their own path and create their own chiplet ecosystems. For the rest of the industry, the real problem is the availability of off the shelf chiplets from which HSoCs can be fabricated from. Without a ready supply of chiplets, NRE for initial HSoCs can be more expensive than a traditional SoC.
What is needed for a real revolution in semiconductor manufacturing is an efficient marketplace for chiplets. Without such a chiplet ecosystem, chiplets and HSoCs will remain the domain of only the giant semiconductor manufacturers. The keys to such a marketplace are appropriate inventory, compatibility, documentation, and testability. Of course, for any commercial entity, there also needs to be a clear route to sustained profitability. This blog will look at some possible business models that may evolve to support a chiplet marketplace.
This section looks at different entities that may become the major enabler of a chiplet marketplace. There is a need for initial critical momentum, or escape velocity, that is required for the establishment of a chiplet marketplace. Part of the need for momentum is the significant amount of initial investment to get the ball rolling and the commensurate uncertainty that faces any first-mover in emerging markets. A sole enabler of the marketplace must be prepared to invest significantly and have a willingness to take some risk. However, it is likely, as you will see explored below, that a vested consortium of enablers may well be the momentum that this new paradigm needs to take off.
Major Semiconductor Vendors
A number of major semiconductor vendors such as Intel, AMD, Marvell, and major system houses like Cisco have all been developing heterogeneous systems and often for very different reasons.
- Intel is perhaps the largest adopter of heterogeneous technology with at least 3 current programs. They use heterogeneous technology on Kaby Lake to deliver a best in class product even going so far as to incorporate a die/chiplet from AMD. On the Stratix 10 and newer Agilex FPGA offerings, they use chiplets to supplement their FPGA fabric as complementary processes allow for high speed processing or analog transceivers not available on the FPGA die.
- AMD uses heterogeneous design to increase yield and allow targeting of only the critical processing components to the most advanced/expensive 7nm technology.
- Cisco uses heterogeneous design simply because their systems have grown so large that they no longer fit on a reticle.
In all of these cases, the engineering teams are solving problems that are very specific to them and not necessarily generic enough for wide audience adoption. Furthermore, the use of the chiplet approach has allowed them to bring a product to market that is superior to what others are currently doing. It is unlikely that they will share these chiplets to enable others to compete with them. Intel’s use of the AMD GPU in the Kaby Lake G is more likely to be the exception than the rule. Perhaps after their heterogeneous systems are on future generations the major semis will begin selling the older generations to others.
It is due to these market realities that I think the major semiconductor companies will continue down the path of developing their own private chiplet ecosystems. Currently, other companies have not yet adopted Intel’s AIB bus standard and may have reasons to think hard about adopting an Intel-advantaged bus standard. This natural self-interest limits the expansion of an ecosystem for the masses.
It’s possible that in order to compete with the major semiconductor vendors, a consortium of smaller manufacturers along with other entities will develop with the hopes of establishing an open ecosystem. There are many such examples in the past where groups of companies banded together to establish a standard. Doing so, at a minimum, ensures compatibility so that chiplets can interconnect.
In a slightly different field, a similar initiative is the Chips Alliance which is an industry consortium aimed at providing open source hardware IP to everyone. The RISC-V foundation is another consortium aiming to provide a standard open source processor ISA to the industry. Finally, and perhaps most relevant, is the Open Domain Specific Architecture (ODSA) group which seeks to drive standardization and help create the environment for a chiplet ecosystem. While these consortiums currently have some major members like Facebook and Intel, they currently lack a clear source of investing “players” (read: independent top-ten semi or systems companies) to kickstart a marketplace.
A semiconductor fab may be one of the best bets to promote a chiplet ecosystem. For starters, they have the manufacturing capability and they stand to profit directly from chiplet sales. Chiplet sales can directly drive wafer volume which aligns well with their core business. Furthermore, they have access to cheap wafer starts as they often run shuttles/MPWs for their own use. Many also have access to important design IP.
To this end, TSMC has developed their own proprietary chiplet to chiplet interface like Intel’s AIB interface. TSMC’s LIPINCON (Low voltage In Package INterCONnect) bus is a proprietary parallel bunch of wires (BOW) interface used to interconnect chiplets. This interface can only be manufactured on TSMC processes and is used with their Chip on Wafer on Substrate (CoWoS) 2.5D packaging technology. Using this approach, TSMC has manufactured HSoCs for such companies as Nvidia and NEC.
Should a fab such as TSMC decide to develop standard compatible chiplets such as a processor chiplet, interface chiplets (Ethernet, SERDES), and an AI chiplet for open consumption and then allow companies to make their own “special sauce” chiplets -a fairly easy path toward an ecosystem may then be charted, though it would be confined to that fab.
EDA IP house
Another possible route to an ecosystem is for one of the major EDA tool houses to chart the course. Synopsys, Cadence, and Mentor Graphics are all giant companies (or parts thereof) with deep resources. They have the tools and in-house design services to develop chiplets. Perhaps more importantly they have large stores of popular semiconductor IP. With the right business model, they could easily create an ecosystem of chiplets for their customers. Such a move would, however, change the way they do business. Instead of selling tools, services, and soft/hard IP, they might now also sell physical silicon which would theoretically or perhaps in reality compete with their IP. However, in many cases they would be enabling the creation of silicon systems that do not get built today due to large NRE expense. This would be a case of growing the pie rather than a redistribution of the slices of the current, much smaller pie.
Giant Open Business Ecosystem Starter
In today’s marketplace, there are a handful of behemoth companies, e.g. the so called FAANG companies who have made so much money and achieved such marketplace dominance that their goals are often beyond short-term profit-making scenarios that typically drive public companies and they can therefore invest in world or industry changing initiatives. At least 4 of these companies do have semiconductor design within their organizations and it would be well within their ethos to become a market maker or supplier of chiplets to the general public even if the whole venture was not widely profitable. If the systems that were created with these chiplets led to revolutionary social change like low cost laptops for the developing world or some other noble or scientific achievement, these companies would be gratified, or at least have a major public relations victory. The cost of starting a chiplet ecosystem would be far less than some of the projects done by some companies, such as providing free WIFI to New York City, balloon-based WIFI or world beating chess machines. This is not to say that those endeavors don’t have their value, this comparison is to simply point out that building a free and open access ecosystem to chip design is well within a plausible future for these companies.
Perhaps the biggest beneficiary of heterogeneous systems will be the defense industry. Currently hampered by a need for increasing electronic sophistication and an increasing inability to pay for advanced semiconductors, the DoD and their Defense Industrial Base has often turned to FPGAs to implement their circuitry. This leads to suboptimal solutions in performance and power and it creates a dramatic obsolescence issue that is deeply concerning government planners today. Whereas DARPA has funded research into chiplets and helped spur the recent interest, it is not the correct agency to establish an ecosystem as they are focused on long term fundamental research.
To this end, the Navy has embarked upon the State-of-the-art Heterogeneous Integrated Packaging (SHIP) program which seeks to develop an onshore advanced packaging and design facility which will focus on keeping heterogeneous capability available to the US government. The initial winners of phase 1 awards for that program are; GE Research, Intel Federal, LLC., Keysight Technologies, Northrop Grumman Aerospace Systems, Qorvo, Xilinx. It will be very interesting to see if a Defense-based ecosystem grows from this effort.
Currently some large military contractors are exploring chiplets and heterogeneous integration to solve their costly low volume SoC needs. Building up a collection of chiplets for their own use and reuse spread across these large organizations will be a very effective way to make custom ASICs at reasonable expense. However, what incentive will these large organizations have to make their chiplets public and sell them on the open market? Would large defense contractor A really enable their competition, large defense contractor B with the important chiplet they might need? Would they enable smaller companies to get into the game? Are there protected technologies which would prevent these chiplets from being shared with the commercial markets?
Unless the chiplets were paid for by the government with explicit guarantees that these companies must sell their chiplets on the open market, it is reasonable to expect that they will not. However, it is more probable to expect an evolution of multiple chiplet ecosystems, each belonging to a major defense contractor or large semiconductor manufacturer. From these ecosystems, each company builds their own HSoCs. Without prior agreement, these ecosystems will emerge with their own proprietary interfaces and will be largely incompatible with each other. In this model, the heterogeneous technology becomes the de-facto standard way to fabricate custom ASICs, but each ASIC is built from competing blocks. Over time, there may or may not be a convergence of this technology.
If Defense contractors see the re-use and supply benefits to sharing the most common chiplets such as processors, interfaces, memories, NoCs, GPUs and AI engines and differentiating their offerings based on their own sub-system chiplets and/or the software and algorithms they develop, a true ecosystem may indeed emerge. It must also be noted that many defense applications require manufacture in a US based fab, thus limiting the field of process technology.
Though no one would argue that the adoption of common standards is the best and cleanest way forward, I think it is unlikely that this will be the path. History has shown us this many times over. Everyone wants a standard and everyone wants the standard to be the one of their own making. Some entities will sit on the sidelines waiting for resolution and some will plow forward trying to make it on their own. If we look at the defense contractor model above, I believe that it is likely that several incompatible chiplet ecosystems will evolve if there is no upfront coordination or mandate driving standards and cooperation. However, if either a main driver or a consortium is willing to take the first steps, an efficient marketplace may emerge.
There are many plausible ways which a chiplet ecosystem may become reality, each with their own strengths and target markets. It will be interesting to see how the large entities (major semiconductor companies, Government, fabs, EDA houses, etc.) develop business models to address this potentially large market which will include other semiconductor manufacturers, defense contractors, start-ups, and everyone else who wants to produce custom silicon hardware but is struggling to afford the significant up-front NRE costs.
In this blog, I’ve talked about several potential ways a chiplet ecosystem might evolve. All are viable, though some more likely than others. Heterogeneous technology is viable and is available as evidenced by the recent offerings from some large semiconductor companies. What holds it back from widespread use is more of a business issue than a technological one.
How do YOU see the ecosystem developing? Please leave your thoughts in the comments section below.
In future blogs I will address the basic chiplet ecosystem needed as well as provide a cost model justifying when the use of heterogeneous design is appropriate.