Careers at Intrinsix

This is a temporary position, with potential for a long-term permanent position in the future, at the Marlborough, Massachusetts Design Center.

(Updated 19 May 2020)

Candidate will work as a Project Manager for Analog/MXS and RFIC development out of the Marlborough, Massachusetts Design Center. Will participate in ASIC and SoC developments from initial formulation of customer proposals and on-going supervision of the Intrinsix design effort, to relationship management between Intrinsix and our clients, including third-party design partners. Will oversee all aspects of project management using planning, monitoring, and controlling processes in the design of cutting-edge custom analog, mixed-signal, and radio-frequency integrated circuits.

Qualifications:

• 10+ years of experience in electronics design and development engineering with focus on ASIC design and integration, including at least 5 years of project management experience.
• Proven track record coordinating the efforts of local and remote hardware design teams for Analog/Mixed-Signal and RFIC projects.
• Proven technical leadership abilities with experience in team building, process improvement, conflict resolution, and motivating people.
• Proven track record in using project management techniques to coordinate the efforts of hardware design teams.
• Skilled in developing Risk Register and Risk Response plans, using pricing models and billing procedures for budget management, and communicating to management the status of resource utilization, project costs, risk management, project profit margins.
• Skilled in Microsoft Project, Microsoft Office (Word, Excel, PowerPoint), and familiar with SharePoint.
• Master's Degree is highly desirable.

Strong candidates will also have one or more of the following:

• Significant experience with supply chain management.
• Significant experience with mmWave/super high-frequency RFIC and radar technologies.
• Experience writing technical proposals and giving technical presentations.
• Experience using Microsoft SharePoint for document sharing and storage, etc.
• Ability to obtain Confidential or Secret Security Clearance is a plus.

Requirements:

• Applicant must have a Bachelor’s or Master’s Degree in Electrical Engineering, Computer Engineering, or an equivalent degree.
• Applicant must have at least 5 years of direct, hands-on experience in Analog/MXS and RF ASIC/SoC design or custom semiconductor device development.
• Applicant must be PMI certified or actively working towards PMP Certification.
• Applicant must be able to communicate technical concepts fluently in written and spoken English.
• Applicant must have permanent legal authorization to work in the U.S. without employer sponsorship.
• Applicant must be a U.S. person.*

*Pursuant to 22 CFR §120.15, a U.S. Person is defined as a U.S. citizen, a U.S. Legal Permanent Resident, or a Protected Person under the Immigration and Naturalization Act – 8 U.S.C.1324b(a)(3).

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 INTRINSIX IS NOT ACCEPTING RESUMES FROM STAFFING AGENCIES OR THIRD-PARTY RECRUITERS AT THIS TIME. NO EMAILS OR PHONE CALLS FROM RECRUITERS, PLEASE.

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This is a temporary-to-permanent position starting immediately based out of the Marlborough, Massachusetts Design Center. During the remainder of the COVID-19 pandemic, subject to Massachusetts state regulations and Intrinsix company policies, this position will be remote/work-from-home. 

(Updated 02 July 2020)

The Payroll & Accounting Specialist will be responsible for all aspects of payroll processing and General Ledger accounting, as well as specific accounting-related tasks; this is a Temporary to Permanent position reporting directly to the Chief Financial Officer.  Candidate must be a hands-on team player with a great attitude, good judgment, and strong interpersonal skills, accepting personal responsibility, demonstrating continual attention to detail, and maintaining confidentiality of company and employee records.

Primary responsibilities:

• Payroll
  • Process semi-monthly payroll for all employees; process payroll entries and run/review payroll reports; resolve payroll questions for employees.
  • Set up new hires and process terminations in ADP; process manual checks for new hires/terminations.
  • Maintain employee profiles (i.e. salary increases, promotions, new addresses, changes in deductions, direct deposit, and response to unemployment claim notices).
  • Support Human Resources in data gathering and reporting upon termination of employees.
  • Update employee benefits enrollment data for new plan year in ADP.
  • Coordinate and set up new states for employee payroll as needed in ADP.
  • Set up 401(k) enrollments and provide contribution updates to ADP; prepare employees’ 401k contribution files each pay period and maintain employee status updates with Fidelity.
  • Assist with annual 401(k) compliance testing and Form 5500 filing.
  • Prepare Quarterly and Year-end reports and year-end W-2 Form distribution.
  • Prepare, approve, and transmit annual ACA Form 1094C and Form 1095C to the IRS.
  • Attend ADP webinars to stay current with new compliance regulations; maintain ADP system upgrades.

• Accounting
  • Prepare and review journal entries for month-end closing; prepare and run monthly financial reports in Microsoft Dynamics SL; and prepare monthly and year-end financial statements.
  • Assist with annual audit(s) and reports, including the annual Worker’s Comp Audit report.
  • Review General Ledger accounts and coordinate with A/R and A/P to assist in reconciling discrepancies.
  • Maintain capital stock ledger, including stock option grants/exercise/cancellation requests; prepare and issue stock certificates when needed; prepare and send out stock option agreements to new hires and existing employees.

Qualifications:

• Proven experience in payroll position using ADP in a fast-paced environment required; self-motivated with ability to learn quickly and work independently.
• Strong knowledge of payroll tax and wage laws, GAAP and industry best practices, familiarity with federal government-related project accounting.
• Strong knowledge and proficiency with Microsoft Excel and MS Office 365, including SharePoint.
• Demonstrated in-depth knowledge of ADP Workforce Now and Microsoft Dynamics SL General Ledger system is preferred.
• Detail-oriented with excellent organizational and communication skills, responding to customer and employee inquiries in a timely manner, with a proven ability to develop effective working relationships with co-workers.

Requirements:

• Minimum of 8 years of direct experience in accounting and general payroll processing.
• Bachelor’s degree in Accounting, Finance, or a closely related discipline.
• Ability to communicate fluently in written and spoken English.
• Permanent legal authorization to work in the U.S. without employer sponsorship. Applicant must be a U.S. person as defined under ITAR.*

*Pursuant to 22 CFR §120.15, a U.S. Person is defined as a U.S. citizen, a U.S. Legal Permanent Resident, or a Protected Person under the Immigration and Naturalization Act – 8 U.S.C.1324b(a)(3).

This is a future potential opening with Intrinsix. 

(Updated 14 April 2020)

In this role you will be a hands-on technical contributor and leader in the design and layout of standard cells for both full- custom and semi-custom ASICs, utilizing your experience in place and route and extraction.

Responsibilities:

• Full-chip layout design.
• Block and chip-level floorplanning and partitioning.
• PNR of standard cells for embedded CPU cores, NoC fabrics, datapath blocks, ALUs, multipliers, etc.
• On schedule delivery of layout blocks and/or macros following top-down strategy and specs.
• Address layout issues such as Multi-Vt design, electromigration, current density issues, IR drop, and power distribution issues.
• Analysis and design of I/O rings and pad placement, bump planning, and distribution layers.

Qualifications:

• 5+ years of experience in transistor-level IC design and layout of standard cells.
• Familiarity with common layout issues (leakage current, signal coupling, parasitic inductance, simultaneous switching noise, peak/average/RMS power, global vs. local variations, etc.)
• Broad depth of knowledge and ASIC design experience in leading-edge technologies and foundries.
• Comfortable using the Cadence physical design platform and Mentor and Cadence parasitic extraction tools.
• Experience with advanced nodes (7nm, 10nm, 14/16nm) is a big plus.
• Ability to obtain Confidential or Secret Security Clearance is a plus.

Requirements:

• Applicant must have a minimum of 5 years of direct experience in ASIC design.
• Applicant must have a Bachelor’s or Master’s Degree in Electrical Engineering, Computer Engineering, or equivalent course of training.
• Applicant must be able to communicate technical concepts fluently in written/spoken English.
• Applicant must have permanent legal authorization to work in the U.S. without employer sponsorship.
• Applicant must be a U.S. Person as defined under ITAR.*

*Pursuant to 22 CFR §120.15, a U.S. Person is defined as a U.S. citizen, a U.S. Legal Permanent Resident, or a Protected Person under the Immigration and Naturalization Act – 8 U.S.C.1324b(a)(3).

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 INTRINSIX IS NOT ACCEPTING RESUMES FROM STAFFING AGENCIES OR THIRD-PARTY RECRUITERS AT THIS TIME. NO EMAILS OR PHONE CALLS FROM RECRUITERS, PLEASE.

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This is a future potential opening with Intrinsix in the Silicon Valley or East Bay area of California only. There is no open position at this time.

(Updated 14 April 2020)

Candidate will leverage broad industry experience with leading-edge IC technologies to serve as a strategic technical leader on Analog/Mixed-Signal ASIC & RFIC projects. Will provide technical pre-sales support to the Business Development team by analyzing customer requirements, proposing and architecting state-of-the-art solutions. Dependent upon candidate’s prior experience, this position may entail managing and growing the A/MXS/RFIC and/or ROIC engineering team.

Qualifications:

• 15+ years of experience in advanced node transistor-level design of Analog/Mixed-Signal and/or RF integrated circuits and systems.
• Hands-on knowledge in all phases of the Mixed-Signal ASIC design flow (design and simulation through GDSII hand-off).
• High level of expertise in standard Analog/Mixed-Signal/RFIC design tools and methodologies.
• Broad knowledge of IC processing technologies and Solid-State Physics.
• Excellent communication skills with significant experience writing technical proposals and giving technical presentations.
• Proven track record in effective interpersonal communication, technical leadership, and team management.

Strong candidates will also have one or more of the following:

• Knowledge of the math associated with linear transforms and quantization theory.
• Experience with A/D converter design, including Sigma Delta Modulators. 
• Broad knowledge of digital filters (FIR, IIR, Decimation, Interpolation, Multi-rate).

• Knowledge and experience in Mixed-Signal Verification techniques.
• Experience with mmWave/high frequency designs (>30 GHz) is highly desirable.
• Expertise in physical design and analog layout is a plus.
• Experience in design of ROICs and imaging sensors/detectors is a plus.
• Ability to obtain Secret Clearance is a plus.

Requirements:

• Applicant must have a Master’s Degree or Ph.D. in Electrical Engineering, Computer Engineering, or equivalent.
• Applicant must have at least 5 years of direct, hands-on experience in mixed-mode ASIC design and verification and SoC development.
• Applicant must be able to communicate fluently in written and spoken English.
• Applicant must be a U.S. person as defined under ITAR.*

*Pursuant to 22 CFR §120.15, a U.S. Person is defined as a U.S. citizen, a U.S. Legal Permanent Resident, or a Protected Person under the Immigration and Naturalization Act – 8 U.S.C.1324b(a)(3).

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 INTRINSIX IS NOT ACCEPTING RESUMES FROM STAFFING AGENCIES OR THIRD-PARTY RECRUITERS AT THIS TIME. NO EMAILS OR PHONE CALLS FROM RECRUITERS, PLEASE.

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This is a potential future position, not an immediate opening.

Candidates must be currently residing in (or planning on relocating permanently to) the state of Indiana. Only Indiana-based applicants will be considered.

(Updated 2 July 2020)

Provide technical leadership on customer projects. Provide technical support in analyzing customer requirements, while architecting and proposing solutions. Craft state-of-the-art solutions for complex ASIC & SoC design problems. Dependent upon candidate’s prior experience, this position may entail managing and growing a team of engineers.

Qualifications:

• 15+ years of experience in High-Performance ASIC & SoC development.
• High level of expertise in IP core integration, such as DSP, RISC CPU and GPU.
• Hands-on knowledge of all phases of the ASIC process (design and simulation through GDSII hand-off).
• Proven track record in technical leadership and team management.
• Experience with a wide variety of semiconductor fabrication vendors.
• Broad knowledge of IC processing technologies and Solid-State Physics.
• Significant experience with synthesis, STA, and DFT ASIC design and verification sign-off methodologies.
• Proficient in SystemVerilog.
• Excellent communication skills with significant experience in writing technical proposals and making technical presentations to customers.
• Expertise in physical design is preferred.

Requirements:

• Applicant must have a minimum of 5 years direct, hands-on experience in ASIC/SoC design and development.
• Applicant must have a Master’s Degree or Ph.D. in Electrical Engineering, Computer Engineering, or equivalent.
• Applicant must be able to communicate technical concepts fluently in written and spoken English.
• Applicant must have permanent legal authorization to work in the U.S. without employer sponsorship.
• Applicant must be a U.S. Person.*

*Pursuant to 22 CFR §120.15, a U.S. Person is defined as a U.S. citizen, a U.S. Legal Permanent Resident, or a Protected Person under the Immigration and Naturalization Act – 8 U.S.C.1324b(a)(3).

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 INTRINSIX IS NOT ACCEPTING RESUMES FROM STAFFING AGENCIES OR THIRD-PARTY RECRUITERS AT THIS TIME. NO EMAILS OR PHONE CALLS FROM RECRUITERS, PLEASE.

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This is a potential future position, not an immediate opening.

Candidates must be currently residing in (or planning on relocating permanently to) the state of Indiana. Only Indiana-based applicants will be considered.

(Updated 2 July 2020)

Serve as an ASIC/SoC/FPGA Lead Design Engineer. Provide hands-on technical design leadership and be an individual contributor on ASIC/SoC and FPGA projects. Hold responsibility for, and contribute to, all phases of an ASIC/SoC/FPGA development starting from creation of an architectural specification through ASIC/SoC/FPGA sign-off. 

Qualifications:

• 8+ years of experience in high-speed ASIC/SoC/FPGA development.
• Previous experience as ASIC/SoC/FPGA design lead.
• Proficient in Verilog.
• Experience with deep-submicron CMOS technologies and a wide variety of ASIC/FPGA vendor technologies.
• Significant experience with synthesis, static timing analysis (STA), and DFT ASIC vendor sign-off methodologies, including Cadence and Synopsys tool flows.
• Knowledge of embedded processor architectures.
• Experience in writing technical specifications as well as technical proposals and project status reports.
• Experience in fixed-point hardware DSP modeling using MATLAB Simulink is a plus.
• Verification experience is a plus.

Requirements:

• Applicant must have a minimum of 5 years of direct experience in ASIC design.
• Applicant must have a Bachelor’s or Master’s Degree in Electrical Engineering, Computer Engineering, or equivalent.
• Applicant must be able to communicate technical concepts fluently in written and spoken English.
• Applicant must have permanent legal authorization to work in the U.S. without employer sponsorship.
• Applicant must be a U.S. Person.*

*Pursuant to 22 CFR §120.15, a U.S. Person is defined as a U.S. citizen, a U.S. Legal Permanent Resident, or a Protected Person under the Immigration and Naturalization Act – 8 U.S.C.1324b(a)(3).

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 INTRINSIX IS NOT ACCEPTING RESUMES FROM STAFFING AGENCIES OR THIRD-PARTY RECRUITERS AT THIS TIME. NO EMAILS OR PHONE CALLS FROM RECRUITERS, PLEASE.

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This is a potential future position, not an immediate opening.

Candidates must be currently residing in (or planning on relocating permanently to) the state of Indiana. Only Indiana-based applicants will be considered.

(Updated 2 July 2020)

Function as a team mentor and individual contributor during all project phases, including transistor-level design, simulation, and layout of analog cells as well as system-level verification of Analog/Mixed-Signal and RF ASICs. Create and modify transistor-level circuit designs for highly complex analog, RF, and mixed-signal ASICs. Run a variety of simulation tools including Cadence Virtuoso to perform schematic capture and simulations. Work with layout engineer to floor plan ASIC blocks and provide guidance on requirements for physical layout.

Qualifications:

• 8+ years of experience in transistor-level design and verification of Mixed-Signal, Analog, or RF circuits and systems.
• Experience with system-level architecture and behavioral modeling of Mixed-Signal, Analog, and RF systems.
• Broad knowledge of IC processing technologies and Solid-State Physics.
• Broad knowledge of digital filters (FIR, IIR, Decimation, Interpolation, Multi-rate).
• 2+ years of project leadership experience with in-depth understanding of ASIC design cycle.
• Applied knowledge of all phases of the ASIC process (design and simulation through GDSII hand-off).
• Experience in the writing and presentation of technical proposals and project status reports.

Strong candidates will also have the following:

• 2+ years  of experience in design of ROICs and imaging sensors/detectors.
• 2+ years of experience in mmWave and/or 30+ GHz RFIC design.
• 5+ years of industry experience with a PhD in Electrical or Computer Engineering or the equivalent course of study.

Requirements:

• Applicant must have a minimum of 5 years direct  hands-on experience in ASIC design.
• Applicant must have a Bachelor's or Master’s Degree in Electrical Engineering, Computer Engineering, or equivalent.
• Applicant must be able to communicate technical concepts fluently in written and spoken English.
• Applicant must have permanent legal authorization to work in the U.S. without employer sponsorship.
• Applicant must be a U.S. person.*

*Pursuant to 22 CFR §120.15, a U.S. Person is defined as a U.S. citizen, a U.S. Legal Permanent Resident, or a Protected Person under the Immigration and Naturalization Act – 8 U.S.C.1324b(a)(3).

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 INTRINSIX IS NOT ACCEPTING RESUMES FROM STAFFING AGENCIES OR THIRD-PARTY RECRUITERS AT THIS TIME. NO EMAILS OR PHONE CALLS FROM RECRUITERS, PLEASE.

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This is a potential future position, not an immediate opening.

Candidates must be currently residing in (or planning on relocating permanently to) the state of Indiana. Only Indiana-based applicants will be considered.

(Updated 2 July 2020)

Craft state-of-the-art solutions for complex Analog and Mixed-Signal ASIC and SoC design problems. Provide technical leadership on customer projects. Provide technical support in analyzing customer requirements, while architecting and proposing solutions. This position may eventually entail managing and growing a team of engineers.

Qualifications:

• 10+ years of experience in transistor-level design and verification of Mixed-Signal, Analog, and RF circuits and systems.
• 5+ years of experience in design of ROICs and imaging sensors/detectors.
• Hands-on knowledge of all phases of the Mixed-Signal ASIC process (design and simulation through GDSII hand-off).
• Proven track record in technical leadership and team management.
• High level of expertise in Mixed-Signal tools and methodologies.
• Broad knowledge of IC processing technologies and Solid-State Physics.
• Excellent communication skills with significant experience in writing technical proposals and making technical presentations to customers.

Strong candidates will also have one or more of the following:

• Experience in ROIC designs for automotive applications.
• Expertise in physical design and analog layout.
• Knowledge of the math associated with linear transforms and quantization theory.
• Experience with A/D converters including Sigma-Delta Modulators.
• Broad knowledge of digital filters (FIR, IIR, Decimation, Interpolation, Multi-rate).
• Ability to obtain Secret Clearance highly desirable.

Requirements:

• Applicant must have at least 8 years of direct, hands-on experience in mixed-mode ASIC design and ASIC/SoC development.
• Applicant must have a Master’s Degree or Ph.D. in Electrical Engineering, Computer Engineering, or equivalent.
• Applicant must be able to communicate technical concepts fluently in written and spoken English.
• Applicant must have permanent legal authorization to work in the U.S. without employer sponsorship.
• Applicant must be a U.S. Person.*

*Pursuant to 22 CFR §120.15, a U.S. Person is defined as a U.S. citizen, a U.S. Legal Permanent Resident, or a Protected Person under the Immigration and Naturalization Act – 8 U.S.C.1324b(a)(3).

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 INTRINSIX IS NOT ACCEPTING RESUMES FROM STAFFING AGENCIES OR THIRD-PARTY RECRUITERS AT THIS TIME. NO EMAILS OR PHONE CALLS FROM RECRUITERS, PLEASE.

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This is a future potential opening with Intrinsix. There is no open position at this time.

(Updated 14 April 2020)

Qualified candidates will have extensive software experience very close to the hardware, and must be involved in ASIC and SoC development alongside the ASIC front-end design team.

Responsibilities include design and implementation of embedded software/firmware for SoC ASICs and FPGAs, including definition and implementation of advanced architectures for real-time embedded processing. You will work with the ASIC design and verification team throughout architecture definition, design implementation, and functional verification phases.  In addition, you will participate in lab bring-up/debug of engineering prototype hardware.  Code development responsibilities include: board support packages, bare metal device drivers, boot code, hardware diagnostics, BIOS development, and RTOS interfacing.

Qualifications:

• 8+ years of experience in real-time embedded systems software development for FPGA, ASIC, and SoC.
• 5+ years of experience with Linux and Windows operating environments.
• Experience with embedded processor (CPU/DSP) core code development.
• Experience using test equipment to test and verify the performance of hardware.
• Experience debugging hardware in a lab environment utilizing test equipment (scopes/analyzers).
• Experience writing detailed software specifications.
• Proficient in C, C++, and assembly programming.
• Familiarity with Verilog RTL.
• Familiarity with ARM and Tensilica ISA and HW architecture highly desirable.
• Experience in FPGA development/verification using VHDL/System Verilog/OVM is a plus.
• Experience modeling and simulating using PSPICE, MATLAB/Simulink is a plus.

Requirements:

• Applicant must have a minimum of 5 years direct experience in embedded software and firmware development for integrated circuits and/or FPGAs.
• Applicant must have a Bachelor’s or Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or an equivalent field of study.
• Applicant must be able to communicate technical concepts fluently in written and spoken English.
• Applicant must have permanent legal authorization to work in the U.S. without employer sponsorship.
• Applicant must be a U.S. Person.

Pursuant to 22 CFR §120.15, a U.S. Person is defined as a U.S. citizen, a U.S. Legal Permanent Resident, or a Protected Person under the Immigration and Naturalization Act – 8 U.S.C.1324b(a)(3).

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 INTRINSIX IS NOT ACCEPTING RESUMES FROM STAFFING AGENCIES OR THIRD-PARTY RECRUITERS AT THIS TIME. NO EMAILS OR PHONE CALLS FROM RECRUITERS, PLEASE.

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This is a future potential opening with Intrinsix. There is no open position at this time.

(Updated 14 April 2020)

Provide hands-on technical contribution and leadership on ASIC/SoC and IP development projects. Help architect, specify, and lead the implementation of verification projects using high-level verification languages and industry standard verification methodologies. Work very closely with ASIC/SoC project leaders to implement complete verification environments and methodologies. Analyze customer technical requirements, propose solutions, and work collaboratively in a multi-site development environment.

Qualifications:

• 7+ years of experience in ASIC/SoC verification in a team environment.
• Experience architecting verification environments and writing test specifications.
• Ability to lead a small verification team, and work collaboratively in a multi-site development environment.
• Extensive applied knowledge of SystemVerilog and UVM.
• Hands-on experience using Object-Oriented Programming (OOP) techniques, random test generation, assertion-based verification, and functional coverage.
• Proficiency in C and experience with Perl, Tcl, Make, UNIX scripting.

Requirements:

• Applicant must have a minimum of 5 years direct experience in ASIC design verification.
• Applicant must have a Bachelor’s or Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
• Applicant must be able to communicate technical concepts fluently in written and spoken English.
• Applicant must have permanent legal authorization to work in the U.S. without employer sponsorship.
• Applicant must be a U.S. Person.

Pursuant to 22 CFR §120.15, a U.S. Person is defined as a U.S. citizen, a U.S. Legal Permanent Resident, or a Protected Person under the Immigration and Naturalization Act – 8 U.S.C.1324b(a)(3).

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 INTRINSIX IS NOT ACCEPTING RESUMES FROM STAFFING AGENCIES OR THIRD-PARTY RECRUITERS AT THIS TIME. NO PHONE CALLS FROM RECRUITERS, PLEASE!

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This is a future potential opening with Intrinsix. There is no open position at this time.

(Updated 14 April 2020)

Candidate will be a hands-on technical contributor and leader in verification of mixed-signal ASIC projects. Candidate will help architect, specify, and lead the implementation of mixed Analog/Digital design verification efforts using analog and digital simulation tools including high-level verification languages.

Qualifications:

• 5+ years of experience in mixed-mode verification in a team environment.
• Experience with analog and digital test generation and familiarity with metrics-driven verification and functional coverage methodology.
• Experience with writing test plans and architecting verification environments.
• Extensive applied knowledge of SystemVerilog and UVM.
• Proficiency in Cadence AMS simulation environment including Spectre, APS, and Incisive.
• Experience with system-level modeling of Mixed-Signal, Analog, and RF systems with Simulink.
• Experience with Real Number Modelling (RNM) and Verilog-AMS.
• Experience with scripting languages (e.g. Make, Perl, Tcl).

Requirements:

• Applicant must have a minimum of 5 years direct experience in mixed-mode ASIC design verification.
• Applicant must have a Bachelor’s or Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
• Applicant must be able to communicate technical concepts fluently in written and spoken English.
• Applicant must have permanent legal authorization to work in the U.S. without employer sponsorship.
• Applicant must be a U.S. Person.*

*Pursuant to 22 CFR §120.15, a U.S. Person is defined as a U.S. citizen, a U.S. Legal Permanent Resident, or a Protected Person under the Immigration and Naturalization Act – 8 U.S.C.1324b(a)(3).

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 INTRINSIX IS NOT ACCEPTING RESUMES FROM STAFFING AGENCIES OR THIRD-PARTY RECRUITERS AT THIS TIME. NO EMAILS OR PHONE CALLS FROM RECRUITERS, PLEASE.

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