Senior Design Engineer (SDE)

Function as a team member during critical aspects of a project: creation of the design specification, design implementation, and module level verification. Specific responsibilities would also include participating in design reviews, RTL coding in VHDL/Verilog, synthesis, and timing analysis.

• 5+ years experience in logic design
• ASIC or large FPGA experience using Verilog and/or VHDL
• Knowledgeable with ASIC DFT strategies and overall ASIC design cycle
• Proven ability to work in a team environment
• BS EE/CS is required
• Applicant must have legal authority to permanently work in the U.S

Intrinsix is an Equal Opportunity Employer

To apply for this position send an email with your resume attached to jobs@intrinsix.com

Please specify in your email which opening/location(s) you are interested in discussing

or call the Human Resources Group at (800) 951-9599