Thursday September 09 , 2010

Principal Verification Engineer

Job Description:

ASIC and SoC Verification Engineer

Title:

Principal Verification Engineer (PVE)

Candidate will be a hands-on technical contributor and leader on ASIC/SoC and IP development projects. Candidate will help architect, specify, and lead the implementation of verification projects using high level verification languages. You will work very closely with ASIC/SoC project leaders to implement complete verification environments and methodologies. This position also involves analyzing customer technical requirements, proposing solutions, and working collaboratively in a multi-site development environment.

Qualifications:

  • 10+ years experience in ASIC/SoC verification in a team environment.
  • Experience with random test generation, assertion based verification, and use of functional coverage.
  • Experienced in architecting verification environments and writing test specifications.
  • Proficiency in Cadence Specman, Synopsys Vera, Verilog and VHDL is a requirement.  System Verilog experience is a plus.
  • Ability to lead a small verification team, and work collaboratively in a multi-site development environment.
  • Experience with Make, perl, Tcl, UNIX scripting.
  • This position requires excellent verbal and written communication skills.
  • BS EE/CS is required.

All qualified applicants will be given consideration.





Intrinsix is an Equal Opportunity Employer

To apply for this position send an email with your resume attached to jobs@intrinsix.com

Please specify in your email which opening/location(s) you are interested in discussing

or call the Human Resources Group at (800) 951-9599